1. Field of the Invention
The present invention relates to an electrical connector for electrically connecting an electronic package such as a land grid array (LGA) chip with a circuit substrate such as a printed circuit board (PCB), and particularly to a connector having protrusions that minimize the risk of accidental damage to an associated electronic package.
2. Description of the Prior Art
Land grid array (LGA) electrical connectors are widely used in the connector industry for electrically connecting LGA chips to printed circuit boards (PCBs) in personal computers (PCs). As described in “Nonlinear Analysis Helps Design LGA Connectors” (Connector Specifier, February 2001, pp. 18-20), the LGA connector mainly comprises an insulative housing and a multiplicity of terminals. The housing comprises a multiplicity of terminal passageways defined therein in a generally rectangular array, for interferentially receiving corresponding conductive terminals. Due to the very high density of the terminal array in a typical LGA chip, the LGA chip need to be precisely seated on the LGA connector to ensure reliable signal transmission between the terminals and the LGA chip. Means for accurately attaching the LGA chip to the LGA connector are disclosed in U.S. Pat. Nos. 5,967,797, 6,132,220, 6,146,151 and 6,176,707.
Referring to FIG. 8, a conventional connector 6 comprises an insulative housing 60 and a multiplicity of conductive terminals 61 received therein. In forming the connector 6, a plurality of carrier strips (not shown) is used. Each carrier strip comprises a row of the terminals 61, and a row of connecting sections 610 respectively connecting the terminals 61 with a main body of the carrier strip. The housing 60 comprises four raised sidewalls 62, and a flat base 63 disposed between the four raised sidewalls 62. Four raised portions 630 are formed upwardly around the flat base 63. Two opposite of the sidewalls 62 each have a sloped surface that slants down toward a corresponding raised portion 630. The base 63 and the sidewalls 62 cooperatively define a space therebetween for receiving an LGA chip (not shown) therein. The base 63 defines a multiplicity of terminal passageways 64 for receiving the terminals 61 therein. When the LGA chip is seated on the LGA connector 6, the four raised portions 630 and the four sidewalls 62 can securely engage the LGA chip therebetween. When a carrier strip is used to insert a row of terminals 61 into a row of the passageways 64 that is adjacent either of said opposite sidewalls 62, the sloped surfaces provide additional space to manipulate the carrier strip so that the connecting sections 610 can be easily cut off from their corresponding terminals 61.
However, the sloped surfaces diminish the main function of said opposite sidewalls 62, which is to provide sufficiently large surface areas that ensure the LGA chip is securely retained between the sidewalls 62. If the LGA chip is not securely retained, this can reduce the reliability of signal transmission between the terminals 61 and the LGA chip.
In addition, when a force is exerted down on the LGA chip to make pads (not shown) of the LGA chip engage with the terminals 61, the force is borne by the four raised portions 630 around the base 63. A middle portion of the LGA chip is liable to be deformed downwardly. This can adversely affect the reliability of signal transmission between the terminals 61 and the LGA chip, and may even permanently damage the LGA chip. In addition, when said force is exerted, the pads of the LGA chip push contacting portions of the terminals 61 to deform downwardly. The contacting portions may also be laterally displaced during such movement. When this happens, the contacting portions may not be accurately engaged with the corresponding pads, resulting in faulty electronic connection between the terminals 61 and the pads.
Therefore, a new LGA electrical connector which overcomes the above-mentioned problems is desired.